1. Field of the Invention
The present invention relates to test equipment for analog-to-digital converters and more particularly to a circuit for simplifying the adjustments required to eliminate offset errors in analog-to-digital converters.
2. Description of the Prior Art
An analog-to-digital converter encodes positive signals directly but negative samples are first inverted in a unity gain inverting amplifier and then encoded. This requires separate input and inverter offset adjustments. Offset in the input amplifier affects positive and negative samples equally and results in a DC component in the encoded output signal. Offset in the inverting amplifier causes an amplitude mis-alignment between the positive and negative halves of the signal and results in nonlinear distortion. In order for the converter to generate true digital representations of the analog input signal, these offset errors must be adjusted to zero.
The typical approach to this adjustment problem is to convert the digital output signals from the converter into an equivalent analog signal and display it on an oscilloscope. The operator must then make a visual determination of which way to adjust the two offset error adjustment controls. However, it is very difficult to determine visually when proper adjustment has been achieved because digitized sine waves are not "clear" in appearance and noise causes the converter output to jump randomly between adjacent steps, causing more than one level to be visible on the oscilloscope for each sample of the sinusoid. Also, because the input and inverting offset are analog quantities, they typically have values which are not integral multiples of the step size which causes further distortion of the oscilloscope waveform.
Accordingly it is an object of the present invention to provide a novel technique of adjusting analog-to-digital converters by reference to a distortion free voltmeter indication of offset errors.